1. Field of the Invention
The invention relates generally to apparatus for receiving a serial data stream and more specifically relates to efficiently packing received frames of a Serial Attached SCSI (SAS) data stream into buffers for efficient transfers from a SAS device to a system memory.
2. Discussion of Related Art
In Serial Attached SCSI (SAS) communications systems, an initiator device (e.g., a storage controller or host system) opens a connection with an identified SAS target device (e.g., a storage device) for purposes of sending data to the target or receiving data from the target. Data is then exchanged over the open connection as frames.
For example, when a SAS target device sends data (i.e., requested read data) to a requesting SAS initiator device, the serial data passes up from the PHY layer (physical layer) of the initiator device to the link layer and so on until eventually, the received data is stored in a memory buffer of the system (i.e., system memory of the initiator device or the host system). This transfer to system buffer memory is typically performed by a direct memory access (DMA) component.
In using a DMA circuit to transfer data, it is common to design the device to set up and start the DMA circuit once some threshold volume of data is received. The overhead processing to set up and start the DMA transfer may be best amortized when the amount of data to transfer is at least as large as the designed threshold value. Otherwise, the device may incur excessive overhead processing by setting up and starting the DMA circuit too frequently for smaller transfers.
For example, in some SAS initiator designs, a DMA threshold may be defined such that the initiator device waits to receive two full frames of data before sending the data, via DMA, to the system memory (i.e., the initiator device's buffer memory). In SAS, a frame may be up to 1024 bytes in length. Thus, a DMA threshold value for such an exemplary initiator device may be 2×1024 or 2048 bytes of data.
SAS (and more generally SCSI) protocols allow for end to end data protection (EEDP) to help assure reliability. In EEDP, data protection information (a data integrity field or DIF) comprising 8 bytes can be inserted/removed/checked for each block of data sent/received from an initiator to a target. The data protection information can be stored/generated/removed/checked in the source/destination device in association with the block of data and is returned/removed with the associated data when the block of data is read back by the initiator device/written to the target device. The sending/receiving device includes a layer of processing that verifies the integrity of the received data (based on the sent/received DIF associated with each block received from the other device). If the blocks of data are properly verified the data (stripped of the DIF field) is then forwarded to the system memory buffer of the receiving device using DMA.
However, where EEDP is used, the DIF information may disrupt the order of the actual user data to be returned to the system buffer memory. Thus, the DMA circuit may be operating in less than an optimal mode due to the non-contiguous nature of the received data (i.e., the received user data with appended DIFs at each data block boundary).
Thus it is an ongoing challenge to efficiently transfer data from a SAS initiator to a system buffer memory using DMA circuits of the initiator device.